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Add persistent led support with eeprom (#9)

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* adding HT32 support to chibios SPI master driver

* add support for W25X20CL SPI eeprom

* add makefile flag for eeprom feature

* add spi support to keyboard startup and config

* example keymap using eeprom profile loading
This commit is contained in:
tech2077
2021-09-12 09:26:16 +02:00
committed by bwisn
parent cab0772352
commit 4bbc680a28
8 changed files with 614 additions and 48 deletions
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platforms/chibios/drivers/spi_master.c
+24 -44
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@@ -38,9 +38,13 @@ __attribute__((weak)) void spi_init(void) {
chThdSleepMilliseconds(10);
#if defined(USE_GPIOV1)
palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), SPI_SCK_PAL_MODE);
palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), SPI_MOSI_PAL_MODE);
palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), SPI_MISO_PAL_MODE);
palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
#elif defined(HT32_SPI_USE_SPI1) || defined(HT32_SPI_USE_SPI2)
palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_HT32_MODE_AF(SPI_SCK_PAL_MODE) | PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_HT32_MODE_AF(SPI_MOSI_PAL_MODE) | PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_HT32_MODE_AF(SPI_MISO_PAL_MODE) | PAL_MODE_OUTPUT_PUSHPULL);
#else
palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
@@ -63,60 +67,36 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
return false;
}
#if defined(K20x) || defined(KL2x)
spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1);
#if defined(HT32_SPI_USE_SPI1) || defined(HT32_SPI_USE_SPI2)
spiConfig.cr0 = SPI_CR0_SELOEN;
spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode
if (lsbFirst) {
spiConfig.tar0 |= SPIx_CTARn_LSBFE;
spiConfig.cr1 |= SPI_CR1_FIRSTBIT;
}
switch (mode) {
case 0:
break;
case 1:
spiConfig.tar0 |= SPIx_CTARn_CPHA;
break;
case 2:
spiConfig.tar0 |= SPIx_CTARn_CPOL;
break;
case 3:
spiConfig.tar0 |= SPIx_CTARn_CPHA | SPIx_CTARn_CPOL;
break;
case 0:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE0;
break;
case 1:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE1;
break;
case 2:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE2;
break;
case 3:
spiConfig.cr1 |= SPI_CR1_FORMAT_MODE3;
break;
}
switch (roundedDivisor) {
case 2:
spiConfig.tar0 |= SPIx_CTARn_BR(0);
break;
case 4:
spiConfig.tar0 |= SPIx_CTARn_BR(1);
break;
case 8:
spiConfig.tar0 |= SPIx_CTARn_BR(3);
break;
case 16:
spiConfig.tar0 |= SPIx_CTARn_BR(4);
break;
case 32:
spiConfig.tar0 |= SPIx_CTARn_BR(5);
break;
case 64:
spiConfig.tar0 |= SPIx_CTARn_BR(6);
break;
case 128:
spiConfig.tar0 |= SPIx_CTARn_BR(7);
break;
case 256:
spiConfig.tar0 |= SPIx_CTARn_BR(8);
break;
}
spiConfig.cpr = (roundedDivisor - 1) >> 1;
#else
spiConfig.cr1 = 0;
if (lsbFirst) {
spiConfig.cr1 |= SPI_CR1_LSBFIRST;
}
switch (mode) {
case 0:
break;