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Fixed critical pipe/endpoint memory allocation issue where the bank memory address space could be silently overlapped in the USB controller if the endpoints or pipes were allocated in anything other than ascending order (thanks to Martin Degelsegger).
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@@ -45,17 +45,47 @@ bool Pipe_ConfigurePipe(const uint8_t Number,
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const uint16_t Size,
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const uint8_t Banks)
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{
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Pipe_SelectPipe(Number);
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Pipe_EnablePipe();
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UPCFG1X = 0;
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uint8_t UPCFG0XTemp[PIPE_TOTAL_PIPES];
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uint8_t UPCFG1XTemp[PIPE_TOTAL_PIPES];
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UPCFG0X = ((Type << EPTYPE0) | Token | ((EndpointNumber & PIPE_EPNUM_MASK) << PEPNUM0));
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UPCFG1X = ((1 << ALLOC) | Banks | Pipe_BytesToEPSizeMask(Size));
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for (uint8_t PNum = 0; PNum < PIPE_TOTAL_PIPES; PNum++)
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{
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Pipe_SelectPipe(PNum);
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UPCFG0XTemp[PNum] = UPCFG0X;
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UPCFG1XTemp[PNum] = UPCFG1X;
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}
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UPCFG0XTemp[Number] = ((Type << EPTYPE0) | Token | ((EndpointNumber & PIPE_EPNUM_MASK) << PEPNUM0));
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UPCFG1XTemp[Number] = ((1 << ALLOC) | Banks | Pipe_BytesToEPSizeMask(Size));
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for (uint8_t PNum = 0; PNum < PIPE_TOTAL_PIPES; PNum++)
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{
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Pipe_SelectPipe(PNum);
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UPIENX = 0;
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UPINTX = 0;
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UPCFG1X = 0;
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Pipe_DisablePipe();
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}
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for (uint8_t PNum = 0; PNum < PIPE_TOTAL_PIPES; PNum++)
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{
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if (!(UPCFG1XTemp[PNum] & (1 << ALLOC)))
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continue;
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Pipe_SelectPipe(PNum);
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Pipe_EnablePipe();
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UPCFG0X = UPCFG0XTemp[PNum];
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UPCFG1X = UPCFG1XTemp[PNum];
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if (!(Pipe_IsConfigured()))
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return false;
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}
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Pipe_SelectPipe(Number);
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Pipe_SetInfiniteINRequests();
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return Pipe_IsConfigured();
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return true;
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}
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void Pipe_ClearPipes(void)
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